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BoilerNet

A compute-enabled Mini-NAS and distributed edge-computing system built around ESP32 nodes, custom PCBs, and swappable storage and workloads.

Year
2025
Context
Purdue ECE Senior Design
Role
PCB + hardware design
Recognition
Purdue ECE Senior Design Award
Team
Gautam Nambiar, Gokulkrishnan Harikrishnan, Akshath Raghav Ravikiran, Aneesh Reddy Poddutur
  • PCB design
  • ESP32
  • Embedded systems
  • Networking
  • Edge computing
The open BoilerNet prototype with custom circuit boards, upright node boards, and yellow removable module enclosures.
OPEN CHASSIS / PROTOTYPE

Custom boards and modular enclosures integrated into the BoilerNet prototype.

BoilerNet was designed as a modular platform for network-attached storage and edge computation, with low-power operation as one of the project goals. ESP32-based nodes, custom hardware, swappable storage and compute elements, and a cloud-hosted interface formed one distributed system.

One system, several engineering domains

At the system level, BoilerNet combined custom network/switch and compute-node PCBs with ESP-IDF firmware, a FastAPI backend, a Streamlit frontend, and a physical enclosure. The repository also preserves model-training and inference work used to explore compute workloads.

03Cloud interfaceFastAPI + Streamlit
02Network / switchCustom PCB
01.AESP32 nodeCompute
01.BStorageSwappable
01.CWorkloadPlug-in
FIG. 01

A simplified editorial map of the project layers described in BoilerNet’s public documentation.

The design targeted modular hardware, plug-and-play workloads, low-power operation, and the ability to scale by adding nodes. Those goals made the interfaces between boards, storage, firmware, networking, and software as important as any single component.

The assembled black BoilerNet enclosure with six visible yellow removable module trays.
FIG. 02

The assembled prototype combines custom electronics and modular bays in a vertical chassis.

Open for full-size view ↗

My contribution

I focused on PCB and hardware-side design alongside Gokulkrishnan Harikrishnan. The public project documentation attributes the PCB work to us jointly. BoilerNet was a four-person effort; firmware, backend, interface, model work, and mechanical integration are project-wide accomplishments unless noted otherwise.

SCHEMATIC / NETWORK + SWITCH

KiCad schematic for BoilerNet's network and switch board, showing power, USB-to-UART, ESP32, microSD, Ethernet, and compute-node connections.Open full resolution

LAYOUT / NETWORK + SWITCH

KiCad board layout for BoilerNet's network and switch PCB, with three ESP32 modules and eight compute-node connectors.Open full resolution
FIG. 03

The network and switch schematic and PCB layout. The board work is jointly attributed to Gautam Nambiar and Gokulkrishnan Harikrishnan. Open either panel to inspect the original-resolution drawing.

Source ↗

Iteration is part of the record

The repository documents fly-wire fixes made while integrating the first PCB designs. That detail matters: the engineering record includes not just a finished enclosure, but the corrections required to turn an initial design into working hardware.

Specific failure modes, validation results, and a second-revision plan are intentionally left out until they can be described from Gautam’s own notes rather than inferred from the repository.

Result

The team demonstrated BoilerNet at Purdue’s SPARK S’25 design showcase and received a Purdue ECE Senior Design Award. Purdue described the project as a distributed, scalable, microcontroller-based edge-computing cluster.

FIG. 04 / DEMO

The team’s project overview and working-system demonstration. The privacy-enhanced YouTube player loads only after Play is selected.

YouTube ↗

The public repository carries the deeper record: source code, tests, PCB source and Gerbers, enclosure CAD, reports, diagrams, and demo material.